1. Field of the Invention
This invention relates in general to strained semiconductor layers and methods for forming the same, and more particularly to stacked semiconductor layers forming dual channel heterostructures.
2. Description of the Related Art
Si1-xGex films are used in a wide variety of semiconductor applications. An issue that often arises during the production of these materials is the lattice strain that may result from heteroepitaxial deposition. A “heteroepitaxial” deposited layer is an epitaxial or single crystal film that has a different composition than the single crystal substrate onto which it is deposited. A deposited epitaxial layer is said to be “strained” when it is constrained to have a lattice structure in at least two dimensions that is the same as that of the underlying single crystal substrate, but different from its inherent lattice constant. Lattice strain occurs because the atoms in the deposited film depart from the positions that they would normally occupy in the lattice structure of the free-standing, bulk material when the film deposits in such a way that its lattice structure matches that of the underlying single crystal substrate. For example, heteroepitaxial deposition of a Ge-containing material such as SiGe or Ge itself onto a single crystal Si substrate generally produces compressive lattice strain because the lattice constant of the deposited Ge-containing material is larger than that of the Si substrate. The degree of strain is related to the thickness of the deposited layer and the degree of lattice mismatch between the deposited material and the underlying substrate.
Strain is in general a desirable attribute for active device layers, since it tends to increase the mobility of electrical carriers and thus increase device speed. In order to produce strained layers on conventional silicon structures, however, it is often helpful to create a strain relaxed, intermediate heteroepitaxial layer to serve as a template for a further strained layer that is to remain strained and serve as an active layer with increased carrier mobility. These intermediate films are often provided by a relaxed Si1-xGex “buffer” layer over single crystal unstrained silicon (e.g., wafer surface), which can be engineered to provide the desired strain of an overlying layer (e.g., strained silicon layer).
Si forms a native oxide layer more readily than Ge, hence Si-over-Ge structures, where silicon is in contact with upper-level features, are preferred. One promising structure being investigated is the combination of a strained Si layer with a strained Ge layer. For example, Lee et al., “Strained Si/strained Ge dual-channel heterostructures on relaxed Si0.5Ge0.5 for symmetric mobility p-type and n-type metal-oxide-semiconductor field-effect transistors,” Applied Physics Letters, Vol. 83, No. 20 (17 Nov. 2003), pp. 4202-04, the teachings of which are incorporated herein by reference, disclose structures with a mobility enhancement by a factor of 1.7-1.9 for electrons and 10-12 for “holes.” The structure takes advantage of the enhanced hole mobility (particularly beneficial for PMOS transistors) in compressively strained Ge, when positioned below a pure Si layer. The overlying tensile strained Si demonstrates enhanced electron mobility, which is particularly beneficial for NMOS transistors. Advantageously, this common channel structure can be provided across both NMOS and PMOS transistors of a CMOS structure, such that dominant channel current is in the strained Ge layer for the PMOS and in the strained Si layer for the NMOS transistors. See also Lee et al., “Growth of strained Si and strained Ge heterostructures on relaxed Si1-xGex by ultrahigh vacuum chemical vapor deposition,” J. Vac. Sci. Technol., Vol. B 22(1) (January/February 2004), pp. 158-164.
The process described by Lee et al. in the above-referenced articles first forms a relaxed Si0.5Ge0.5 layer, followed by a compressively strained Ge layer, followed by a tensile strained Si layer thereover. The primary challenge identified by Lee et al. in their work was the ability to deposit thin, planar layers in this system. Strained layers (including the Si0.5Ge0.5 layer prior to relaxation) have a tendency to relax via stress-driven surface diffusion, resulting in islanding or undulations. Deposition temperature, degree of lattice mismatch in the heteroepitaxy and material melting points tend to affect the morphology of the layers. The melting point of Si1-xGex decreases with Ge content and the surface diffusivity of a material generally scales with its melting point. Accordingly, while low temperatures are still needed, compressive Si1-xGex films are less susceptible to undulation than pure Ge films for a given temperature and strain.
Lee et al. were able to achieve decent planarity by employing ultra high vacuum CVD (UHVCVD) at 350° C. to deposit Ge (even 400° C. resulted in unacceptable undulations and roughness). Subsequently a Si cap layer had to be deposited in order to maintain planarity, and also to serve the dual function of a Si channel in a dual channel heterostructure. Lee et al. also needed to raise the deposition temperature in order to achieve any level of Si deposition using common hydrides as precursors. By employing disilane (Si2H6) rather than more common monosilane (SiH4), Lee et al. were able to deposit at 450° C. (thus reducing incidence of undulations). However, a Si cap layer of only 3 nm thickness took 1.5 hours to grow at 450° C.
More efficient, commercially feasible methods are therefore desirable.